Has the era of co-packaged optics finally arrived?

Part 3: Co-packaged optics: Ayar Labs CEO interview

Mark Wade, newly appointed CEO of Ayar Labs, shares what his new role entails and why, after a decade-long journey, co-packaged optics' time has come.

Ayar Labs' CEO, Mark Wade

Mark Wade, the recently appointed CEO of Ayar Labs, says his new role feels strangely familiar. Wade finds himself revisiting tasks he performed in the early days of the start-up that he helped co-found. 

“In the first two years, I would do external-facing stuff during the day and then start working on our chips from 5 PM to midnight,” says Wade, who until last year was the company’s chief technology officer (CTO).  

More practically, says Wade, he has spent much of the first months since becoming CEO living out of a suitcase and meeting with customers, investors, and shareholders. 

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Drut tackles disaggregation at a data centre scale

• Drut’s DynamicXcelerator supports up to 4,096 accelerators using optical switching and co-packaged optics. Four such clusters enable the scaling to reach 16,384 accelerators.
• The system costs less and is cheaper to run, has lower latency, and better uses the processors and memory.
• The system is an open design supporting CPUs and GPUs from different vendors. 
• DynamicXcelerator will ship in the second half of 2024.

Bill Koss (L) and Jitender Miglani.

Drut Technologies has detailed a system that links up to 4,096 accelerator chips. And further scaling, to 16,384 GPUs, is possible by combining four such systems in ‘availability zones’.

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Broadcom's first Jericho3 takes on AI's networking challenge

Broadcom’s Jericho silicon has taken an exciting turn.

Oozie Parizer

The Jericho devices are used for edge and core routers.

But the first chip of Broadcom’s next-generation Jericho is aimed at artificial intelligence (AI); another indicator, if one is needed, of AI’s predominance.

Dubbed the Jericho3-AI, the device networks AI accelerator chips that run massive machine-learning workloads.

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Enfabrica’s chip tackles AI supercomputing challenges

• Enfabrica’s accelerated compute fabric chip is designed to scale computing clusters comprising CPUs and specialist accelerator chips.
• The chip uses memory disaggregation and high-bandwidth networking for accelerator-based servers tackling artificial intelligence (AI) tasks.

Rochan Sankar

For over a decade, cloud players have packed their data centres with x86-based CPU servers linked using tiers of Ethernet switches.

“The reason why Ethernet networking has been at the core of the infrastructure is that it is incredibly resilient,” says Rochan Sankar, CEO and co-founder of Enfabrica.

But the rise of AI and machine learning is causing the traditional architecture to change.

What is required is a mix of processors: CPUs and accelerators. Accelerators are specialist processors such as graphics processing units (GPUs), programmable logic (FPGAs), and custom ASICs developed by the hyperscalers.

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Data centre photonics - an ECOC report

• ECOC 2022 included talks on optical switching and co-packaged optics.
• Speakers discussed optical switching trends and Google's revelation that it has been using optical circuit switching in its data centres.
• Nvidia discussed its latest chips, how they are used to build high-performance computing systems, and why optical input-output will play a critical role.

Co-packaged optics and optical switching within the data centre were prominent topics at the recent ECOC 2022 conference and exhibition in Basel, Switzerland.

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Telecoms' innovation problem and its wider cost

Imagine how useful 3D video calls would have been this last year.

The technologies needed - a light field display and digital compression techniques to send the resulting data across a network - do exist but practical holographic systems for communication remain years off.

Source: Accelerating Innovation in the Telecommunications Arena

But this is just the sort of application that telcos should be pursuing to benefit their businesses.

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UK quantum algorithm start-up targets first opportunity

A UK start-up developing software for quantum computers has received £3.25 million ($4.1 million) in funding. 

Riverlane, based in Cambridge, is working with leading quantum computing hardware companies as well as large corporates interested in benefiting from the technology.

The start-up will use the funding to grow the company and has already identified the most promising applications for the technology.

“A lot of people are building hardware using various technologies such as iron trap or supercomputing qubits,” says Steve Brierley, CEO of Riverlane. “What we are trying to do is make that [hardware] useful as soon as possible.” A qubit is the shorthand term for a quantum bit.

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