Avago's latest optical engine targets active optical cables
Avago Technologies has unveiled its first family of active optical cables for use in the data centre and for high performance computing.
The company has developed an optical engine for use in the active optical cables (AOCs). Known as the Atlas 75x, the optical engine reduces the power consumption and cost of the AOC to better compete with direct-attach copper cables.
“Some 99 percent of [active optical cable] applications are 20m or less”
Sharon Hall, Avago
"This is a price-elastic market," says Sharon Hall, product line manager for embedded optics at Avago Technologies. "A 20 percent price premium over a copper solution, then it starts to get interesting."
The AOC family comprises a 10 Gigabit-per-second (Gbps) single channel SFP+ and two QSFP+ cables - a 4x10Gbps QSFP+ and a QSFP+-to-four SFP+. The SFP+ AOC is used for 10 Gigabit Ethernet, 8 Gigabit Fibre Channel and Infiniband applications. The QSFP+ is used for 4-channel Infiniband, serial-attached SCSI (SAS) storage while the QSFP-to-four-SFP+ is required for server applications.
There are also three 12-channel CXP AOC products: 10-channel and 12-channel cables with each channel at 10Gbps; and a 12-channel CXP, each at 12.5Gbps. The devices supports the 100GBASE-SR10 100 Gigabit Ethernet and 12-channel Infiniband standards.
The 12-channel 12.5Gbps CXP product is used typically for proprietary applications such as chassis-to-chassis links where greater bandwidth is required, says Avago.
The SFP+ and QSFP+ products have a reach of 20m whereas competing AOC products achieve 100m. “Some 99 percent of applications are 20m or less,” says Hall.
The SFP+ and QSFP+ AOC products use the Atlas 75x optical engine. The CXP cable uses Avago’s existing Atlas 77x MicroPod engine and has a reach of 100m.
The Atlas 75x duplex 10Gbps engine reduces the power consumption by adopting a CMOS-based VCSEL driver instead of a silicon germanium one. “With CMOS you do not get the same level of performance as silicon germanium and that impacts the reach,” says Hall. “This is why the MicroPod is more geared for the high-end solutions.”
The result of using the Atlas 75x is an SFP+ AOC with a power consumption of 270mW compared to 200mW of a passive direct-attach copper cable. However, the SFP+ AOC has a lower bit error rate (1x10-15 vs. 1x10-12), a reach of up to 20m compared to the copper cable’s 7m and is only a quarter of the weight.
The SFP+ AOC does have a lower power consumption compared to active direct-attach cable, which consumes 400-800mW and has a reach of 15m.
Avago says that up to a 30m reach is possible using the Atlas 75x optical engine. Meanwhile, samples of the AOCs are available now.
Altera optical FPGA in 100 Gigabit Ethernet traffic demo
Altera is demonstrating its optical FPGA at OFC/NFOEC, being held in Los Angeles this week. The FPGA, coupled to parallel optical interfaces, is being used to send and receive 100 Gigabit Ethernet packets of various sizes.
The technology demonstrator comprises an Altera Stratix IV FPGA with 28, 11.3Gbps electrical transceivers coupled to two Avago Technologies' MicroPod optical modules.
"FPGAs are now being used for full system level solutions"
Kevin Cackovic, Altera
The MicroPods - a 12x10Gbps transmitter and a 12x10Gbps optical transceiver - are co-packaged with the FPGA. "All the interconnect between the serdes and the optics are on the package, not on the board," says Steve Sharp, marketing program manager, fiber optic products division at Avago. Such a design benefits signal integrity and power consumption, he says: "It opens up a different world for FPGA users, and for system integration for optic users."
Both Altera and Avago stress that the optical FPGA has been designed deliberately using proven technologies. "We wanted to focus on demonstrating the integration of the optics, not pushing either of the process technologies to the absolute edge," says Sharp.
The nature of FPGA designs has changed in recent years, says Kevin Cackovic, senior strategic marketing manager of Altera's transmission business unit. Many designs no longer use FPGAs solely to interface application-specific standard products to ASICs, or as a co-processor. "FPGAs are now being used for full system level solutions, things like a framer or MAC technology, forward error correction at very high rates, mapper engines, packet processing and traffic management," he says.
Having its FPGAs in such designs has highlighted for Altera current and upcoming system bottlenecks. "This is what is driving our interest in looking at this technology and what is possible integrating the optics into the FPGA," says Cackovic. Applications requiring the higher bandwidth and the greater reach of optical - rack-to-rack rather than chip-to-module - include next-generation video, cloud computing and 3D gaming, he says.
Altera has still to announce its product plans regarding the optical FPGA dsign. Meanwhile Avago says it is looking at higher-speed versions of MicroPod.
"The request for higher line rates is obviously there," says Sharp. "Whether it goes all the way to 28 [Gigabit] or one of the steps in-between, we are not sure yet."
Altera unveils its optical FPGA prototype
Altera has been showcasing a field-programmable gate array (FPGA) chip with optical interfaces. The 'optical FPGA' prototype makes use of parallel optical interfaces from Avago Technologies.
Combining the FPGA with optics extends the reach of the chip's transceivers to up to 100m. Such a device, once commercially available, will be used to connect high-speed electronics on a line card without requiring exotic printed circuit board (PCB) materials. An optical FPGA will also be used to link equipment such as Ethernet switches in the data centre.
"It is solving a problem the industry is going to face," says Craig Davis, product marketing manager at Altera. "As you go to faster bit-rate transceivers, the losses on the PCB become huge."
What has been done
Altera's optical FPGA technology demonstrator combines a large FPGA - a Stratix IV EP4S100G5 - to two Avago 'MicroPod' 12x10.3 Gigabit-per-second (Gbps) optical engines.
Avago's MicroPod 12x10Gbps optical engine deviceThe FPGA used has 28, 11.3Gbps electrical transceivers and in the optical FPGA implementation, 12 of the interfaces connect to the two MicroPods, a transmitter optical sub-assembly (TOSA) and a receiver optical sub-assembly (ROSA).
The MicroPod measures 8x8mm and uses 850nm VCSELs. The two optical engines interface to a MTP connector and consume 2-3W. Each MicroPod sits in a housing - a land grid array compression socket - that is integrated as part of the FPGA package.
"The reason we are doing it [the demonstrator] with a 10 Gig FPGA and 10 Gig transceivers is that they are known, good technologies," says Davis. "It is a production GT part and known Avago optics."
Why it matters
FPGAs, with their huge digital logic resources and multiple high-speed electrical interfaces, are playing an increasingly important role in telecom and datacom equipment as the cost to develop application-specific standard product (ASSP) devices continues to rise.
The 40nm-CMOS Stratix IV FPGA family have up to 32, 11.3Gbps transceivers, while Altera's latest 28nm Stratix V FPGAs support up to 66x14.1Gbps transceivers, or 4x28Gbps and 32x12.5Gbps electrical transceivers on-chip.
Altera's FPGAs can implement the 10GBASE-KR backplane standard at spans of up to 40 inches. "You have got the distances on the line card, the two end connectors and whatever the distances are across a 19-inch rack," says Davis. Moving to 28Gbps transceivers, the distance is reduced significantly to several inches only. To counter such losses expensive PCBs must be used.
One way to solve this problem is to go optical, says Davis. Adding 12-channel 10Gbps optical engines means that the reach of the FPGAs is up to 100m, simplifying PCB design and reducing cost while enabling racks and systems to be linked.
The multimode fibre connector to the MicroPod
Developing an optical FPGA prototype highlights that chip vendors already recognise the role optical interfaces will play.
It is also good news for optical component players as the chip market promises a future with orders of magnitude greater volumes than the traditional telecom market.
The optical FPGA is one target market for silicon photonics players. One, Luxtera, has already demonstrated its technology operating at 28Gbps.
What next
Altera stresses that this is a technology demonstrator only.
The company has not made any announcements regarding when its first optical FPGA product will be launched, and whether the optical technology will enter the market interfacing to its FPGAs' 11.3Gbps, 14.1Gbps or highest-speed 28Gbps transceivers.
The undersideof the FPGA, showing the 1,932-pin ball grid array
Optical engines bring Terabit bandwidth on a card
Such a parallel optics design offer several advantages when used on a motherboard. It offer greater flexibility when cooling since traditional optics are normally in pluggable slots at the card edge, furthest away from the fans. Such optical engines also simplify high-speed signal routing and electromagnetic interference issues since fibre is used rather than copper traces.
Figure 1: Fourteen 120Gbps MiniPods on a board. Source: Avago Technologies
Avago has two designs – the 8x8mm MicroPod and the 22x18mm MiniPod. The 12x10.3125 Gigabit-per-second (Gbps) MicroPods are being used in IBM’s Blue Gene computer and Avago says it is already shipping tens of thousands of the devices a month.
“The [MicroPod’s] signal pins have a very tight pitch and some of our customers find that difficult to do,” says Victor Krutul, director of marketing for the fibre optics division at Avago Technologies. The MiniPod design tackles this by using the MicroPod optical engine but a more relaxed pitch. The MiniPod uses a 9x9 electrical MegArray connector and is now sampling, says Avago.
Figure 1 shows 14 MiniPod optical engines on a board, each operating at 12x10Gbps. “If you were trying to route all those signals electrically on the board, it would be impossible,” says Krutul. All 14 MiniPods go to one connector, equating to a 1.68Tbps interface.
Figure 2: Sixteen MicroPods in a 4x4 array. Source: Avago Technologies
Figure 2 shows 16 MicroPods in a 4x4 array. “Those [MicroPods] can get even closer,” says Krutul. Also shown are the connectors to the MicroPod array. Avago has worked with US Conec to design connectors whereby the flat ribbon fibres linking the MicroPods can stack on top of each other. In this example, there are four connections for each row of MicroPods.