Wednesday
Dec102014
FPGAs embrace data centre co-processing role
Wednesday, December 10, 2014 at 8:12AM Part 1: Xilinx's SDAccel development tool
The PCIe accelerator card has a power budget of 25W. Hyper data centres can host hundreds of thousands of servers whereas other industries with more specialist computation requirements use far fewers servers. As such, they can afford a higher power budget per card. Source: Xilinx
Xilinx has developed a software-design environment that simplifies the use of an FPGA as a co-processor alongside the server's x86 instruction set microprocessor.
Dubbed SDAccel, the development environment enables a software engineer to write applications using OpenCL, C or the C++ programming language running on servers in the data centre.
tagged Baidu, GPU, Kintex, Microsoft, PCI Express, RTL, SDAccel, Virtex, X86, Xilinx, data centre Print Article
Baidu, GPU, Kintex, Microsoft, PCI Express, RTL, SDAccel, Virtex, X86, Xilinx, data centre Print Article 