EZchip packs 100 ARM cores into one networking chip

The Tile-Mx100. Source: EZchip

• The industry's first detailed chip featuring 100, 64-bit ARM cores
• The Tile-Mx devices will perform control plane processing and data plane processing
• The 100-core chip will have 100 Gigabit Ethernet ports and support 200 Gigabit duplex traffic 

EZchip has detailed the industry's first 100-core processor. Dubbed the Tile-Mx100, the processor will be the most powerful of a family of devices aimed at such applications as software-defined networking (SDN), network function virtualisation (NFV), load-balancing and security. Other uses include video processing and application recognition, to identify applications riding over a carrier's network.

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EZchip expands the role of the network processor

• EZchip's NPS-400 will be a 200Gbps duplex chip capable of layer 2 to layer 7 network processing
• The device is being aimed at edge routers and the data centre
• First samples by year end

EZchip Semiconductor has announced a class of network processor capable of performing traditional data plane processing as well as higher layer networking tasks.
EZchip's announced NPS will extend the role of the network processor to encompass layer two to layer seven of the network. Source: EZchip
"It [the device family] is designed to provide processing for all the networking layers, from layer two all the way to layer seven," says Amir Eyal, EZChip’s vice president of business development. Network processors typically offer layer-two and layer-three processing only.

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