Wednesday
Jan192022
PCI-SIG releases the next PCI Express bus specification
Wednesday, January 19, 2022 at 2:05PM
The Peripheral Component Interconnect Express (PCIe) 6.0 specification doubles the data rate to deliver 64 giga-transfers-per-second (GT/s) per lane.
For a 16-lane configuration, the resulting bidirectional data transfer capacity is 256 gigabytes-per-second (GBps).
“We’ve doubled the I/O bandwidth in two and a half years, and the average pace is now under three years,” says Al Yanes, President of the Peripheral Component Interconnect Special Interest Group (PCI-SIG).
The significance of the specification’s release is that PCI-SIG members can now plan their products.
Users of FPGA-based accelerators, for example, will know that in 12-18 months there will be motherboards running at such rates, says Yanes.
tagged 800 Gigabit Ethernet, Al Yanes, CXL, DPUs, FPGAs, GPUs, PCI-SIG, PCIe 6.0 Print Article