Do optical DACs have a role in future coherent modems?
Monday, April 3, 2023 at 11:36AM - A proposed optical digital-to-analogue converter (oDAC) concept offers several system benefits, including better signal performance, higher bit rates and lower power consumption.
- The oDAC design benefits coherent optics but can also be used in direct-detect designs. This article focusses on coherent optics.
- Coherent system vendors are aware of oDAC technology but it is not part of their current roadmaps.
A 256-QAM constellation using a conventional coherent transmitter (left) and using the oDAC. Note there is no modulator loss (the full area is used) nor any optical warping using the oDAC. Source: Tomkos and Nazarathy.
Systems vendors continue to advance the performance of optical transmission systems. But they are the first to admit the task is getting more complex.
Long-distance transmission is challenging due to the channel impairments introduced by the optical fibre, such as noise, chromatic dispersion, and non-linearities.
Coherent modems have become the established technology that use a powerful digital signal processor (DSP) and optics to counter channel impairments.
In recent years the industry has progressed coherent technology to such a degree that it is now difficult to keep improving optical performance.
One critical component of the coherent DSP is the analogue front end: the transmitter’s digital-to-analogue converters (DACs) and the receiver's analogue-to-digital converters (ADCs).
The DACs take the digital signal input and produce the analogue drive signal for the coherent optics’ Mach-Zehnder modulators. In turm, the DSP’s ADCs sample the signal at the receiver’s optics before recovering the transmitted data payload.
The challenge facing coherent DSP designers is to keep scaling the bandwidth of the DACs and ADCs while maintaining high resolution and high energy efficiency.
This growing challenge has led some researchers to propose alternatives.
One such proposal is an optical digital-to-analogue converter or oDAC.
The status of coherent DSPs
Recent announcements from leading coherent optic vendors, including Cisco's Acacia, Ciena, Infinera, NEL, and Nokia, show the continual progress in hiking the symbol rate of coherent DSPs.
Professor Ioannis Tomkos
Vendors want to keep increasing the symbol rate - the frequency of the symbols where each symbol carries one or more bits, depending on the modulation scheme used - since it remains the best way to reduce the cost of sending network traffic.
First-generation coherent systems used a symbol of 32 gigabaud (GBd). Now, Acacia's currently shipping 5nm CMOS Jannu DSP operates at up to 140GBd. Ciena, meanwhile, has detailed its WaveLogic 6 Extreme, the first coherent DSP implemented in 3nm CMOS that will work at up to 200GBd.
To scale the baud rate, all the sub-systems making up the coherent modem must scale.
The sub-systems include the DSP's DACs and ADCs, the modulator drivers, and the trans-impedance amplifiers. The coherent optics - the coherent driver modulator (CDM) transmitter and the integrated coherent receiver (ICR) - must also scale.
For a 200GBd symbol rate, the bandwidth of all these components must reach 100GHz.
Looking ahead
The industry consensus is that coherent modems will reach 280-300GBd before the decade's end. But to do so will require considerable engineering effort.
The industry offers less visibility after 300+GBd.
System vendors say that at some future point, it will not make economic sense to keep increasing the baud rate. It will be too costly to make the coherent modem and reducing the cost-per-bit will stop.
Already each new generation CMOS node is more costly while new materials are needed to scale the optics. Ciena says it is using silicon photonics for the integrated coherent receiver, while indium phosphide is being used for the transmitter's modulators. Ciena is also looking at thin-film lithium niobate as a modulator technology.
As for DACs and ADCs, circuit designers face considerable challenges in achieving a 100GHz bandwidth.
Moreover, the DACs and ADCs sample faster than the baud rate, typically 1.2x. At OFC, imec, the Belgium technology research centre, outlined its work on 3nm coherent DSPs showing a sample rate of 250 giga-samples/s.
Professor Moshe Nazarathy
Such huge sampling rates explain the interest in optical DACs which can process a high-baud rate signal to generate, using optical parallelism, an ultra-high bit-rate signal based on either multi-level Pulse Amplitude Modulation (PAM) or Quadradure Amplitude Modulation (QAM) signals.
Two prominent professors promoting an optical DAC design are Ioannis Tomkos of the department of electrical and computer engineering at the University of Patras, Greece, and Moshe Nazarathy at the faculty of electrical engineering at the Technion University, Israel.
Limitations of DACs
Tomkos starts by highlighting the shortcomings of conventional DACs.
DACs not only have to operate sampling rates at least as high as the baud rate but they also have a finite resolution. Typically, 6-8 bits are used for coherent designs.
The effective number of bits (ENOB) available are even lower due to the clock jitter when operating the electrical circuits at such high speeds.
The finite effective number of bits limit the use of higher-order modulation schemes. Today, coherent systems use up to 16-ary quadrature amplitude modulation (16-QAM), except for the highest capacity, shortest-distance links.
A second issue is the non-linear nature of the optical modulator’s transfer function. "It’s a sine non-linearity type of response in Mach-Zehnder modulators due to the nature of interference," says Tomkos.
This requires operating the modulator over a reduced range, the linear region of its transfer function around its biasing voltage.
Such curtailing of the driver saves power but results in ‘modulator loss’; the area occupied by the modulator’s constellation points is less than the ideal available (see top left diagram).
"You not driving the modulator to the limit," says Tomkos. "Modulation loss can be as high as 9-12dB which impacts signal recovery at the receiver."
Source: Tomkos and Nazarathy.
The relation between the driving DAC inputs and the discrete optical outputs is generally nonlinear (see diagram above). This means the constellation points look warped and are not spaced equally apart causing signal distortion.
Such optical distortion can be tackled using various specialised DAC architectures but the cost is either higher power, limited speed or extra modulation loss.
"Ideally, we would like to have equal distances between the symbols so we can robustly separate each symbol from the others since we also have electronic errors coming from the DACs that impact the quality of the symbols and shift them from their optimal points," says Tomkos.
The impact of modulation loss and optical distortion also worsen when higher modulation schemes above 16-QAM are used.
The oDAC
Mention the term optical DAC, and specific thoughts come to mind. Is the optical signal sampled? Is the DAC electrical in its input and output, but its inner workings are photonic?
The optical DAC, as proposed by Nazarathy and Tomkos, is neither of the above. Moreover, it uses existing driver electronics based on the simplest traditional lowest-order DACs.
Indeed, the oDAC looks similar to a conventional coherent optics transmitter in terms of components, but the differences in operation and achieved performance are significant.
The oDAC can also be implemented in several ways bringing critical benefits for various system requirements.
Architecture
A conventional coherent optical transmitter splits the incoming laser source and feeds the light equally to the in-phase and quadrature Mach-Zehnder modulators (one arm of which includes a 90-degree phase shifter).
Source: Tomkos and Nazarathy.
The two Mach-Zehnder modulators are driven, as shown. In this example, two drivers implement a bipolar 4-level pulse amplitude modulation (PAM-4) signal such that the coherent transmitter produces a 16-QAM output signal.
The oDAC architecture is subtly different.
The oDAC's main two components are a variable splitter and combiner at the input and output and the Mach-Zehnder modulator pair. Here, both modulators are identical; there is no 90o phase shifter but the differential phase is maintained at 0o degrees and the modulators are operated at full-scale resulting in zero modulation loss (see diagram at the article's start).
Source: Tomkos and Nazarathy.
Each modulator arm is driven by an electrical PAM-4 signal, and the variable splitter-combiner produces the bipolar PAM-16 optical output.
For 16-PAM, 4/5 of the laser signal is fed to one arm and the remaining 1/5 to the other. The PAM-4 DAC drivers for both Mach-Zehnder modulators are identical.
“In the first case, we had 16 symbols in two dimensions (i.e. QAM16); here we have 16 symbols, but in one dimension (i.e. PAM16), the other dimension is missing due to the absence of the 90-degree phase shifter,” says Tomkos.
According to Tomkos, the sine nonlinearity of the optical modulators here is an advantage. "The generated signal does not suffer from modulation loss and optical distortion due to electronic driver mismatch errors, as the noise coming from the electronic DACs gets squelched," he says.
Higher-order modulation
As mentioned, the oDACs can be implemented and arranged in several ways.
For example, two oDACs can be used, one orthogonal in phase to the other, in a conventional coherent transmitter structure to generate a higher modulation signal. For example, two optical DAC arms, each 16-PAM, used as I and Q, will produce a 256-QAM signal.
Source: Tomkos and Nazarathy.
But even more strikingly, more than two parallel modulation paths (by stacking-up more modulators in parallel, see diagram) can be used as an alternative approach to generating higher-order modulation schemes and higher bit rates, and at reduced power consumption per bit.
"The ratio between the bit rate and the baud rate is exactly the number of parallel paths," says Nazarathy. "Another name for it is spectral efficiency: how many bits each symbol carries."
The oDAC uses straightforward drivers. The professors say only PAM-2 or PAM-4 drivers are used. This way, power savings are maximised.
"The big picture is that we offload the electronics burden by going parallel optically," says Nazarathy, adding that what is being traded is electronic DAC complexity and the associated performance limitations of the drivers for optical parallelism of replicated blocks of Mach-Zehnder modulators.
"You don't want to stack things [photonic componentry] serially as if you keep stacking that way, you incur an optical loss because the loss is compounded,” says Nazarathy. Here, the modulators are stacked in parallel, the preferred integration approach.
Moreover, the more paths used, the higher-order the generated optical constellation is. "Eventually, only PAM-2 (Non-return-to-zero) drivers are used and that’s the minimum power consumption you can get," says Tomkos.
"So we have parallelism (at the same laser power) that generates for the same baud rate, double or triple the bit rate [depending on whether 2 or 3 paths are used],” says Nazarathy. And the resulting constellations are near ideal: there is no modulation loss, nor is there optical distortion.
Nazarathy explains such benefits as the result of a ‘divide-and-conquer’ approach.
"If you keep the modulation paths simple, you have more freedom to optimise the drive point of the modulators," he says. "The modulators benefit you more because they are more simply driven." Then, by adding more modulator paths, the system performance improves overall.”
He also notes how the optical implementation is robust to imperfections generated by the electronic circuitry.
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Optical DAC: A definition
- Two or more optical modulator units and some static or slowly-tuned ‘glue’ optics.
- The electrical drivers feeding the optical modulators are simple for lowest-power, either PAM2 (NRZ) or PAM4 drivers. Electronic DACs generating higher-order PAM are not needed.
- No high-speed power-hungry digital encoder (mapper) is used. The number of Mach-Zehnder modulators is B where the constellation size is C=2B. This is referred to as Direct Digital Drive. This last condition ensures the lowest power consumption.
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Status
The oDAC work is currently at the research stage.
The working of the oDAC has been simulated and verified, and several papers have been published. Patents have also been filed.
At the recent OFC event in San Diago in March, Professor Tomkos met with hyperscalers, systems and components vendors to explain the oDAC technology and its benefits.
The two academics are focused on the oDAC in the optical transmitter, but Nazarathy says they also plan to surprise at the optical receiver end.
Tomkos says the optical DAC is an ideal fit for future coherent transmitters that will be used in 6G networks and datacenter networks, which will carry significant amounts of traffic at ultra-high rates.
The oDAC approach also bodes well for the trend of using linear drive optics. Indeed, the implementation of the oDAC hardware is carried out within the framework of a major R&D project called FLEX-SCALE that Tomkos is co-ordinating and is funded under the first phase of the 6G Smart Networks and Services (SNS) Partnership.
Tomkos believes that the first use of the optical DAC may likely be for data centre interconnect, a more mature market where higher-order modulation formats can be used and low-power is at a premium.
The professors are looking for partners and exploring options to commercialise the technology.
Reader Comments (7)
In practice this is extremely difficult to make work because the two paths must be matched to 4 bits. Further, the full scale oDAC must be 4 bits accurate, not 2 bits, so there is no implementation simplification and no power savings. Separately, PAM16 is of no use in the datacenter because the SNR is far below required for any link.
Dear Chris,
We thank you for expressing you opinion on the oDACs in the comment you posted in relation to this article. We have a lot of respect for your technical know-how and we would be delighted to have a detailed offline discussion with you about the oDAC-based transmitters and how they compare with the conventional implementation.
Here, we would like to provide short Responses (Rs) to the three Points (Ps) you raised:
P#1: “In practice this is extremely difficult to make work because the two paths must be matched to 4 bits.”
R#1: We agree that it is indeed “very difficult” and that’s why we are pleased to be able to offer a solution to the optical communications community. Our approach, based on years of studies and experience on how to control differential phase changes over optical paths on photonic integrated circuits, enables us to realize the ‘matching' of the two parallel paths of the oDAC at a much smaller penalty (as measured by ENOB or BER) compared to any alternative conventional solution designed to achieve the same functionality.
P#2: “Further, the full scale oDAC must be 4 bits accurate, not 2 bits, so there is no implementation simplification and no power savings.”
R#2: Again, we agree with the first part of your statement that “the full scale oDAC must be 4 bits accurate, not 2 bits”, but there is an unclear leap to the conclusion you reach at the second half of your sentence, i.e. “so there is no implementation simplification and no power savings”. When one speaks of ‘simplification’ there must be a clear baseline to compare with. In our case, we compare our oDACs in terms of constellation quality with a conventional optoelectronic subsystem generating an optical PAM16 constellation at the same SNR (for more details on it you may check the recently published article: “2serial-2parallel optical DAC for high-resolution photonic-efficient energy-efficient 4|16|64|256QAM,” IEEE Photonics Technology Letters, May 2023).
With the novel proposed oDAC, we eliminate the need for utilizing a costly future 16-level electrical DAC (that should operate at ultra-high baud rates and generate properly pre-distorted electrical signal levels). By removing the power consuming electrical DAC we need to utilize only an extra MZM in parallel to the one conventionally used (and some slowly tunable ‘glue’ optics) and just PAM2 (NRZ) or PAM4 electronics. Unless someone has an idea on how to create a 16-level electrical DAC, the proposed alternative design may look like a big simplification to most engineers.
In terms of power consumption, this alternative oDAC design requires practically no more than the power to operate the additional MZM, while it saves on the power of operating the advance 16-level electrical DAC and it improves the constellation integrity (linearity) well beyond what an electrical 16-level DAC would be capable of, and it removes the need for backing off the modulator to operate in its linear region thus it improves the output oSNR.
P#3: “Separately, PAM16 is of no use in the datacenter because the SNR is far below required for any link."
R#3: We agree that a oPAM16 Tx with a Direct-Detect (DD) Rx may not hack it in datacenters, but our intended application is not for a DD system. We are focusing on the use of our oDACs for coherent (COH) detection systems. In fact, in parallel with our efforts to develop ultra-high rate Tx, we are running a parallel activity in which we develop a simplified (lite) COH receiver that will complement the oDAC based transmitter to offer an ‘ultimate' solution for datacenter transceivers. Our investigations so far shows that the expected extra loss-budget margin we gain might be sufficient to bridge up to tens of km (i.e. beyond the requirements for intra-datacenter- connectivity).
Of course, it’s going to take us a while to get to a commercial prototype, but with the partnerships we aspire to build we hope to be able to offer in a couple of years a Tbps scale transceiver solution for short reach applications at unbeatable power consumption per bit. Besides, as Steve Jobs said, “the journey is the reward”.
Moshe Nazarathy & Ioannis Tomkos
Dear Profs. Nazarathy & Tomkos,
To better understand why a segmented oDAC does not inherently have lower power or complexity than a single stage oDAC (DAC driving a single modulator), let's look at an ideal DAC.
A canonical configuration for an N-bit DAC is the summation of N binary weighted current sources. The MSB current source is half the total DAC current, and must be accurate to N bits. The MSB-1 current source is quarter of the total DAC current and must be accurate to (N-1) bits, and so on down the line. For example, in a 4-bit DAC, the two MSB current sources require 3 times the current of the two LSB current sources.
In a segmented oDAC, the 2-bit MSB oDAC has the same power and precision requirements as the two MSBs of a single 4-bit oDAC. The 2-bit LSB oDAC has the same power and precision requirements as the two LSBs of a single 4-bit oDAC.
Theoretically, there is no intrinsic advantage or disadvantage to a two modulator segmented oDAC vs. a single modulator oDAC. In practice the segmented oDAC is much more difficult because matching optical components is much more difficult than matching electrical components.
There is an oDAC topology with a potential implementation advantage. In it each modulator is driven by one DAC bit, i.e. N modulators for an N-bit oDAC. This means that all the drivers are limiting instead of linear. However, you are proposing two bits per modulator, requiring the drivers to be linear just like in a single stage oDAC.
Dear Chris,
Thank you for this second response, which opened with the following statement: #P0 “To better understand why a segmented oDAC does not inherently have lower power or complexity than a single stage oDAC (DAC driving a single modulator)...”.
This led us to realize that we have a miscommunication, not on substance, but on the grammatical subject of discourse.
As it sometimes happens when messages are posted and fruitful discussions ensue, there may still arise mutual misunderstandings about the very topics that the back-and-forth postings address. In our earlier first round of exchanges, it turns out that we were respectively referring to two distinct topics, hence our discussion must be recalibrated: (a) In your current response you refer to what we call a
2-serial SEMZM (Segmented MZM).
(b) But in our first response to your comment, we were actually referring to our 4-bit 2-parallel MZM. Those are two distinct devices (apples vs oranges), so this seems to be the source of our mutual misunderstandings.
There is also a third device, consisting of a combo of (a) and (b):
(c) The 4-bit 2serial2parallel MZM.
(d) There is also a fourth family of devices, namely BinaryWeighted N-bit Multi-parallel oDAC, which we introduced in our first paper on the topic of oDACs […]. You seem to be unaware of our 2021 publication since in your last response, at the end of your comment, you essentially propose essentially the same device, which we have already disseminated.
As for oDAC devices [a]-[d], our four relevant references are (not necessarily in order):
[1] M. Nazarathy and I. Tomkos, “Accurate Power-Efficient Format-Scalable Multi-Parallel Optical Digital-to-Analogue Conversion,” Photonics, MDPI, pp. 1–51, 2021.
[2] M. Nazarathy and I. Tomkos, “‘Perfect’ PAM4 Serial Digital-Optical Conversion,” IEEE Photonics Technology Letters, vol. 33, no. 10, pp. 475–478, May 2021.
[3] M. Nazarathy and I. Tomkos, “Energy-Efficient Reconfigurable 4|16|64|256-QAM Transmitter Based on PAM2|4-Driven Optical DACs,” IEEE Photonics Technology Letters, vol. 34, no. 21, pp. 1159–1162, Nov. 2022.
[4] M. Nazarathy and I. Tomkos, “2serial-2parallel optical DAC for high-resolution photonic-efficient energy-efficient 4|16|64|256QAM,” IEEE Photonics Technology Letters, May 2023,
For the record let us also specifically respond to your specific points #P1-#P4, our Responses being denoted #R1-#P4:
#P1 “…let's look at an ideal DAC. A canonical configuration for an N-bit DAC is the summation of N binary weighted current sources. The MSB current source is half the total DAC current, and must be accurate to N bits. The MSB-1 current source is quarter of the total DAC current and must be accurate to (N-1) bits, and so on down the line. For example, in a 4-bit DAC, the two MSB current sources require 3 times the current of the two LSB current sources.”
#R1 We essentially agree with your comments here, except that your quantitative statements need some polishing. For example, this sentence is only an approximation: “The MSB current source is half the total DAC current”
Let’s assume a unipolar (UNIP) DAC, and normalize its Least-Significant Level (Source) to unity. Then the N sources are: {1,2,4,8,…,2^(N-1}}. The sum of sources is 2^N - 1 . The ratio of the Most Significant Level (MSL) to the total current is (2^(N-1))/(2^N-1). This is not equal to half (but it is close to it for large N). For example, in a 4-bit UNIP DAC, the sources are {1,2,4,8}, their sum is TOT=15 and MSL/TOT=8/15, which somewhat differs from half. In a N=4-bit UNIP DAC with sources {1,2,4,8} the two most significant sources are 4,8 their sum is 12, the two least significant sources are 1,2 their sum is 3, the ratio is 12:3=4, thus it is 4 times - not 3 times, as you stated.
But since, as we explained in the last message, we focus on oDACs for coherent detection, we are interested in generating Bipolar BIP constellations. For example a 4-bit BIP PAM16 oDAC has 16 equispaced levels, {-15,-13,-11, …, -3,-1,1,3, …,11, 13, 15}, which may be generated from the sources {±1,±2,±4,±8}. Any level in the constellation may be expressed as the sum of these four signed numbers with appropriate signs chosen. For the sources vector {±1,±2,±4,±8} your statements also do not apply as is. But this inaccuracy is inconsequential for our discussion.
#P2 “In a segmented oDAC, the 2-bit MSB oDAC has the same power and precision requirements as the two MSBs of a single 4-bit oDAC. The 2-bit LSB oDAC has the same power and precision requirements as the two LSBs of a single 4-bit oDAC.”
We agree - but in our response we were not referring to the 2-bit, 2-serial Segmented-oDAC (to which you referred) but rather to the 2-bit 2-parallel MZM oDAC, the device we listed as (b) above and we elaborated upon in our publications [3],[4]. The 2-serial Segmented-oDAC (2s-SEMZM) is optimized in our publication [2]. There we have shown that this segmented device may be designed to be ‘perfect’, but actually ‘perfect’ means “as good as a perfect single MZM driven by a properly predistorted 4-level electronic DAC (device (b))”. This comparison is actually developed in [4], where we show that intrinsically, the 2s-SEMZM is equivalent to the “single MZM driven by a properly predistorted 4-level electronic DAC (device (b))”. “Equivalent” here means generating the same BIP PAM16 constellation. BTW, 2s-SEMZM is designed in all published research based on two electrodes in 2:1 ratio, which we have proven to be grossly suboptimal. In [2] we show how to use the weird 1.55:1 electrode ratio to optimize the device to intrinsically 'perfect'.
#P3 “Theoretically, there is no intrinsic advantage or disadvantage to a two modulator segmented oDAC vs. a single modulator oDAC. In practice the segmented oDAC is much more difficult because matching optical components is much more difficult than matching electrical components.”
#R3 In light of our response #R2 we agree with your statements at face value (and we have rigorously proven in [4] the assertion you made of the equivalence of the 2-segment oDAC with a single MZM driven by a properly predistorted constellation. But we say at face value, since generating a “properly predistorted constellation” may be hard under certain conditions, e.g. in the new scenario of Linear Drive Optics, harped by Arista and others at OFC2023. The reason why we value the 2segment MZM oDAC device (a), is that it is a building block in our device (c) above namely the 4-bit 2serial2parallel MZM (described in [4]), which combines the serial and parallel architectures.
This 4-bit device generating BIP PAM16 (for IQ nesting to 256QAM) has the following practical advantages: *It has just 2parallel paths thus easier to match than having more paths (in each path we have a 2serial Segmented-MZM).
*it is driven by four independent NRZ signals.
*intrinsically, (i.e., under perfect matching and hypothetically assuming no excess losses) it generates the perfect BIP PAM16 constellation {-15,-13,-11, …, -3,-1,1,3, …,11, 13, 15}, stretched over full scale, i.e. the levels ±15 carry 100% of the photons (no light lost to free output ports). Finally, your statement “matching optical components is much more difficult than matching electrical components.” is well said.
But that is precisely the investment to make in order to enjoy the benefits of a practical smartly selected oDAC topology. We invested 8 years (prior to our direct last 4 years in oDAC) in developing innovative methods to “match optical components”. These skills come extremely handy for oDACs, instilling confidence in us that we are up to the task of tuning and matching the paths of the oDAC to attain the requisite resolution (one of the tasks of our FLEXSCALE European project).
#P4 “There is an oDAC topology with a potential implementation advantage. In it each modulator is driven by one DAC bit, i.e. N modulators for an N-bit oDAC. This means that all the drivers are limiting instead of linear. However, you are proposing two bits per modulator, requiring the drivers to be linear just like in a single stage oDAC.”. The N-paths single-bit-per-path oDAC topology you propose here is “right up our alley” - it is what we disclosed in our publication [4] in early 2021, and had it researched extensively re its optimization, and we shall soon have a patent out on it.
Again, thank you for your comments and we hope to have an opportunity to discuss these topics more interactively. Our invitation to have a telecon with you withstands - to avoid miscommunication and to benefit from your insights and share our own cumulative insights on oDAC with you.
Moshe Nazarathy and Ioannis Tomkos
Dear Profs. Nazarathy & Tomkos,
Thank you for the in-depth treatment. This is good material which should be presented to a wider audience.
The binary weighted segmented oDAC is not my idea and has been under consideration for a long time. PAM4 2 segment version is used in some silicon photonics products.
Chris
Dear Chris,
Re approaching a wider audience, our next oral presentation is going to be ICTON2023 in July, where we aim to systematically compare the various oDAC options in a practical optical engineering mindset.
Thank you so much for all your comments, we really appreciate your exploration of this topic in light of your wide field of view.
Moshe and Ioannis,
Dear Chris,
Many thanks for your comments and insights.
We are discussing openly our research work and results with the optical communications research community, as well as key industry players and end-users (I.e. vendors and hyperscalers/operators).
Our novel contributions (i.e. those refered to our publications as: "Multi-Parallel" and "Serial-Parallel" oDAC architectures) are novel and not previously publicly disclosed at any publication or patent by any others. We are happy to learn that there have been under consideration (at least some variations). With our work and the assistance from our current/future partners, we hope that we can bring them to the market. Such a development, will unlock the current limitations in scaling-up the bit-rates of optical transceivers in a power/cost efficient way.
We hope to continue our discussions in person at a relevant conference/meeting.
Best regards,
Ioannis