Mellanox to acquire silicon photonics player Kotura
Source: Gazettabyte
Mellanox Technologies has announced its intention to acquire silicon photonics player, Kotura, for $82 million.
The acquisition will enable Mellanox to deliver 100 Gigabit Infiniband and Ethernet interconnect in the coming two years. lt will also provide Kotura with the resources needed to bring its 100 Gigabit QSFP to market. Mellanox will also gain Kotura's optical engine for use in active optical cables and new mid-plane platform designs, as well as future higher speed interfaces.
The news is also significant for the optical component industry. Kotura is one of the three established merchant silicon photonics players - the others being LightWire and Luxtera - that have spent years developing their technologies.
LightWire was acquired by Cisco Systems in March 2012 for US $271 million and now Mellanox plans to acquire Kotura. The two equipment vendors recognise the value of the technology, bringing it in-house to reduce system interconnect costs and as a long term differentiator for their equipment and ASIC designs. Mellanox, as a silicon photonics player, will compete with Intel, with its own silicon photonics technology, and Cisco Systems.
Kotura has been using its technology to sell telecom products such as variable optical attenuators and multiplexers. The start-up recently announced its 100 Gig QSFP that uses wavelength division multiplexing (WDM) transmitter and receiver chips. The product is to become available in 2014.
In an interview last year, Kotura's CTO, Mehdi Asghari, discussed a roadmap showing how its 100 Gigabit silicon photonics technology could scale to 400 Gigabit and eventually 1.6 Terabit.
"Our devices are capable of running at 40 or 50 Gigabit-per-second (Gbps), depending on the electronics. The electronics is going to limit the speed of our devices. We can very easily see going from four channels at 25Gbps to 16 channels at 25Gbps to provide a 400 Gigabit solution," Asghari told Gazettabyte.
Kotura also discussed how the line rate could be increased to 50Gbps either using a non-return-to-zero (NRZ) line rate or using a multi-level modulation such as pulse amplitude modulation (PAM).
"To get to 1.6 Terabit transceivers, we envisage something running at 40Gbps times 40 channels or 50Gbps times 32 channels. We already have done a single receiver chip demonstrator that has 40 channels, each at 40Gbps," said Asghari.
"These things in silicon are not a big deal. The III-V guys really struggle with yield and cost. But you can envisage scaling to that level of complexity in a silicon platform."
Silicon photonics will not replace existing VCSEL or indium phosphide-based transceiver designs. But there is no doubting silicon photonics is emerging as a key optical technology and the segment is heating up.
If the early start-ups are being acquired, there have been more recent silicon photonics players entering the marketplace such as Aurrion, Skorpios Technologies and Teraxion. There are also internal developments among equipment players such as Alcatel-Lucent, HP Labs and IBM. Indeed Kotura has worked closely with Oracle (Sun Microsystems)
Further acquisitions of silicon photonic players should be expected as companies start designing next generation, denser systems and adopt 100 Gigabit and faster interfaces.
Equally, established optical component and module companies will likely enter quietly (and not so quietly) the marketplace adding silicon photonics to their technology toolkits when the timing is right.
Trends to watch
Two industry trends are underway regarding silicon photonics.
The first is system vendors wanting to own the technology to reduce their costs while recognising a need to control and understand the technology as they tackle more complex equipment designs.
The other, what at first glance is a contrarian trend, is the democratisation of silicon photonics.
The technology is slowly passing from the select few to become more generally available for industry use. For this to happen, the relevant design tools need to mature as do third-party fabrication plants that will manufacture the silicon photonics designs.
Appendix:
On June 4th, 2013, Mellanox announced a definitive agreement to acquire chip company IPtronics for $47.5 million as it builds out its in-house technologies for optical interconnect. Click here
Futher reading:
Avago to acquire CyOptics, click here
Kotura demonstrates a 100 Gigabit QSFP
“QSFP will be the long-term winner at 100 Gig; the same way QSFP has been a high volume winner at 40 Gig”
Arlon Martin, Kotura
The device is aimed at plugging the gap between vertical-cavity surface-emitting laser (VCSEL) -based 100GBASE-SR10 designs that have span 100m, and the CFP-based 100GBASE-LR4 that has a 10km reach.
“It is aimed at the intermediate space, which the IEEE is looking at a new standard for," says Arlon Martin, vice president of marketing at Kotura.
The device is similar to Luxtera's 100 Gigabit-per-second (Gbps) QSFP, also detailed at the OFC/NFOEC 2013 exhibition, and is targeting the same switch applications in the data centre. “Where we differ is our ability to do wavelength-division multiplexing (WDM) on a chip,” says Martin. Kotura also uses third-party electronics such as laser drivers and transimpedance amplifiers (TIA) whereas Luxtera develops and integrates its own.
The Kotura QSFP uses four wavelengths, each at 25Gbps, that operate around 1550nm. “We picked 1550nm because that is where a lot of the WDM applications are," says Martin. “There are also some customers that want more than four channels.” The company says it is also doing development work at 1310nm.
Although Kotura's implementation doesn't adhere to an IEEE standard - the standard is still work in progress - Martin points out that the 10x10 MSA is also not an IEEE standard, yet is probably the best selling client-side 100Gbps interface.
Optical component and module vendors including Avago Technologies, Finisar, Oclaro, Oplink, Fujitsu Optical Components and NeoPhotonics all announced CFP2 module products at OFC/NFOEC 2013. The CFP2 is the next pluggable form factor on the CFP MSA roadmap and is approximately half the size of the CFP.
The advent of the CFP2 enables eight 100Gbps pluggable modules on a system's front panel compared to four CFPs. But with the QSFP, up to 24 modules can be fitted while 48 are possible when mounted double sidedly - ’belly-to-belly’ - across the panel. “QSFP will be the long-term winner at 100 Gig; the same way QSFP has been a high volume winner at 40 Gig,” says Martin.
The QSFP uses 28Gbps pins, which is also called the QSFP28, but Kotura refers to it 100Gbps product as a QSFP. The design consumes 3.5W and uses two silicon photonic chips. Kotura says 80 percent of the total power consumption is due to the electronics.
One of the two chips is the silicon transmitter which houses the platform for the four lasers (gain chips) combined as a four-channel array. Each is an external cavity laser where part of the cavity is within the indium phosphide device and the rest in the silicon photonics waveguide. The gain chips are flip-chipped onto the silicon. The transmitter also includes a grating that sets each laser's wavelength, four modulators, and a WDM multiplexer to combine the four wavelengths before transmission on the fibre.
Kotura's 4x25 Gig transmitter and receiver chips. Source: Kotura
The receiver chip uses a four-channel demultiplexer with each channel fed to a germanium photo-detector. Two chips are used as it is easier to package each as a transmitter optical sub-assembly (TOSA) or receiver optical sub-assembly (ROSA), says Martin. The 100Gbps QSFP will be generally available in 2014.
Disruptive system design
The recent Compass-EOS IP router announcement is a welcome development, says Kotura, as it brings the optics inside the system - an example of mid-board optics - as opposed to the front panel. Compass-EOS refers to its novel icPhotonics chip combining a router chip and optics as silicon photonics but in practice it is an integrated optics design. The 168 VCSELs and 168 photodetectors per chip is massively parallel interconnect, says Martin.
“The advantage, from our point of view of silicon photonics, is to do WDM on the same fibre in order to reduce the amount of cabling and interconnect needed,” he says. At 100 Gigabit this reduces the cabling by a factor of four and this will grow with more 25Gbps wavelength channels used to 10x or even 40x eventually.
“What we want to do is transition from the electronics to the optical domain as close to those large switching chips as possible,” says Martin. “Pioneers [like Compass-EOS] demonstrating that style of architecture are to be welcomed."
Kotura says that every company that is building large switching and routing ASICs is looking at various interface options. "We have talked to quite a few of them,” says Martin.
One solution suited to silicon photonics is to place the lasers on the front panel while putting the modulation, detection and WDM devices - packaged using silicon photonics - right next to the ASICs. This way the laser works at the cooler room temperature while the rest of the circuitry can be at the temperature of the chip, says Martin.
Q&A with Kotura's CTO: Integration styles and I/O limits
The second, and final part, of the Q&A with Mehdi Asghari, CTO of silicon photonics start-up, Kotura.
Part 2 of 2
"When do the big players adopt a new technology and go from an electrical to an optical solution? In my experience, usually when they absolutely have to."
Mehdi Asghari, CTO, Kotura
Q: Silicon photonics comes in two integration flavours: the monolithic approach where the modulators and detectors are implemented monolithically while the lasers are coupled externally (e.g. Kotura and Luxtera); and heterogeneous integration where III-V materials such as indium phosphide are bonded to the silicon to form a hybrid design yet are grown on a single die (e.g. Aurrion). Does one approach have an advantage?
A: I have a III-V background and converted to silicon photonics over 15 years ago. The key issue here is what are you trying to do? Why are we going from III-V processing to silicon? Is it the yield and process maturity or the device performance for actives?
If it is the former, then heterogeneous integration does not really solve the problem since you are still processing III-V devices and are likely to need multiple fabs to do it. If it is the latter then you should stick to III-V wafers.
The fact is that silicon provides passive performance that is far superior to III-V while the active performance – the detector and modulator - is good enough. In fact our germanium detectors could be better and our electro-absorption modulators can be lower power and exhibit a broader working spectral range.
We have seen repeatedly that being good enough is all that silicon has to show it can do to win and that it is certainly doing.
"It is not enough to offer a 10%, 20% or even a 50% cost saving when you are offering the customer a brand new solution that comes with all the risks and unknowns associated with that technology."
Kotura has developed components for telecom (variable optical attenuators, and the functions needed for a 100 Gig coherent receiver) yet its focus is on datacom. Why is that?
We started in telecom as we looked for low hanging fruit that could give us a good margin and an easy start in our early days. This is important for a start-up with a new technology. The well-entrenched incumbent technologies are hard to displace.
You have to find an application with a clear value proposition to get started. Once you have established yourself, your supply chain and manufacturing infrastructure, you can take on more challenging and larger market opportunities.
We see certain areas in datacom that are not well served by either the short reach optics or the telecom grade solutions. Extended reach data centre is one key area where short-reach optics based on VCSELs cannot cover the reach needed and conventional telecom solutions are inherently over-engineered and do not meet the power, cost and size needed.
We think silicon photonics can play a key role here as a starting point in datacom. A key advantage of our platform here is that we can do WDM [wavelength division multiplexing] and hence offer 100 Gig on a single fibre (per direction). This is a major cost saving for longer reaches (>>50m) deployed in such links.
There are some big system players with silicon photonics (Cisco Systems, Alcatel-Lucent) and several small merchant silicon photonics players, such as the companies mentioned in the previous question, which must develop products to sell while funding the development of their technologies. How do you expect the silicon photonics marketplace to evolve, especially now that the technology is being more widely embraced?
For silicon photonics to succeed commercially, we need a multitude of vibrant and successful players in the field. Some of these can be start-ups that lead the innovation in technology and manufacturing but others can be larger organisations that have invested to service an internal need or leverage an existing dominance in the market.
There is room and a necessity for both. It takes a village to raise a child. One single company will not turn silicon photonics into a successful commercial reality.
Cisco Systems has been talking about its proprietary CPAK transceiver. Here is an example of a system vendor using in-house silicon photonics for its own use. Why do you think about such a development? And is Kotura being approached by equipment vendors that want to work with you to develop a custom design?
It is not new for a large company like Cisco to try and make sure that is has its own proprietary components to go into its systems to protect their product and their margins. We see that in all industries.
In terms of other companies coming up with their own proprietary solutions, we do see more and more of this - and a lot more this year than last year - especially when you come off the telecom bandwagon and into the datacom environment: data centres and high-performance computing.
That is because the customer is in charge of the entire environment, the two ends of the link, they can leverage more value from the solution you have to offer without worrying about standards. This is one way for systems companies to leverage value from components.
People are starting to see that the conventional technologies they have deployed are hitting a wall. When they are deploying a new solution they are rethinking their hardware strategy, and how they leverage it to add more value and differentiation to their system.
New ways to architect systems are becoming possible. If you are able to avoid limitations such as distance between the processor and memory, the router and switches and so on, you can come up with a very different architecture for your system and solution.
When do the big players adopt a new technology and go from an electrical to an optical solution? In my experience, usually when they absolutely have to. Most people don't adopt a new solution until they really, really need to; when the value proposition completely outweighs the risk.
It is not enough to offer a 10%, 20% or even a 50% cost saving when you are offering the customer a brand new solution that comes with all the risks and unknowns associated with that technology.
You have to offer them something new, to enable a new application, to add value by enabling a feature, something they can leverage in their product.
When you say systems people adopt new technology when they hit a wall, can you highlight examples of these hurdles?
When you look at the adoption of optics coming from the copper-dominated connectivity, it is very interesting.
Originally, for optics to work its way into the copper world, it had to hide itself and look like a copper solution. People had no idea how to create connectors and they were worried about fibre. So it was disguised as a copper solution.
As customers have got used to it, we can now come out and be more open. We can now do more innovative things with optical transceivers. If you look at the adoption rate, it is being accelerated by customers' demand such as 25 Gigabit signalling.
We can see that the processors and the ASICs - a switch from Broadcom or a processor from Intel or AMD - they are running into I/O [input/ output] density bottlenecks. The chip area is pretty constant, the packages are about the standard size, the number of pins are going beyond what they can support, they have to ramp up the pin rate to about 25 Gigabit-per-second (Gbps), while there are also some 10Gbps pins.
But the number of 25Gbps pins are becoming so high, potentially many hundreds, that they are not going to be able to trace them into the PCB (printed circuit board). The PCB can only take a 25Gbps signal for about 4 inches (~10cm) and then you need serdes [serialiser/ deserialiser) and repeaters.
You may imagine a current router or switch ASIC having ten 25Gbps pins and 100 10Gbps pins. The 10Gbps pins I can take to the edge and use 10Gbps transceivers; and the ten 25Gbps pins I can still do something about it. I may need a lot of electronics and serdes, and use pre-emphasis and equalisation.
But the next generation, when it becomes 100 25Gbps pins, you just cannot do that at the board level. That is where we will start to have to use optics close to the chip.
Will they go for very compact transceivers that sit next to the ASIC or would they try and co-package it with the ASIC?
My perception is that the first generation will be next to the ASIC. People will not integrate an unknown technology into a multi-billion dollar business, they will hedge their bets and have an external solution that offers them some level of assurance that if one solution does not work, they can change to another. But once they get used to it, they can start to integrate these in a multi-chip module solution.
What are the timescales?
I see transceivers next to the ASICs being deployed around 2017-18, maybe a bit sooner, with the co-packaging around 2018-20. People are already talking about it but usually these things take longer.
For part 1 of the Q&A, click here
Further reading:
Silicon photonics: Q&A with Kotura's CTO
A Q&A with Mehdi Asghari, CTO of silicon photonics start-up, Kotura. In part one, Asghari talks about a recent IEEE conference he co-chaired that included silicon photonics, the next Ethernet standard, and the merits of silicon photonics for system design.
Part 1
"Photons and electrons are like cats and dogs. Electrons are dogs: they behave, they stick by you, they are loyal, they do exactly as you tell them, whereas cats are their own animals and they do what they like. And that is what photons are like."
Mehdi Asghari, CTO of Kotura
Q: You recently co-chaired the IEEE International Conference on Group IV Photonics that included silicon photonics. What developments and trends would you highlight?
A: This year I wanted to show that silicon photonics was ready to make a leap from an active area of scientific research to a platform for engineering innovation and product development.
To this end, I needed to show that the ecosystem was ready and present. Therefore, a key objective was to get the industry more involved with the conference. "This has always been a challenge," I was told.
To address this issue I asked my co-chair, MIT's Professor Jurgen Michel, that we appoint joint-session chairs, one from industry and one from academia. We got people we knew from Google, Oracle and Intel as co-chairs, and paired them with prominent academics and asked them to ensure that there were an equal number of industry-invited talks in the schedule. We knew this would be a major attraction to industry attendees. We also got the industry to fund the conference at a level that set an IEEE record.
A key highlight of the show was a boat cruise journey on San Diego bay with Dr. Andrew Rickman as speaker, sharing his experiences and thoughts about setting up the first silicon photonics company - Bookham Technology - over 20 years ago.
Among other distinguished industry speakers we had Samsung telling us of the role of silicon photonics in consumer applications, Broadcom on the need for on-chip optical communication, Cisco on the role of silicon photonics in the future of the Internet, and Google on its broadband fibre-to-the-home (FTTh) initiative and what silicon photonics could offer in this area.
Oracle also shared its latest development in silicon photonics and the application of the technology in their systems, while Luxtera discussed the latest developments in its CMOS photonics platform, particularly the 4x25 Gigabit-per-second (Gbps) platform.
We also heard about the latest germanium laser development at MIT and had an invited speaker to talk about what III-V devices could do and to provide a comparison to silicon to make sure we are not blinded by our own rhetoric.
We ended up with a record number of attendees for the conference and, perhaps more importantly, close to half from industry; a record and vindicated my motivation and perspective for the conference and that silicon photonics is ready and coming.
Was there a trend or presentation at the IEEE event that stood out?
There are two areas creating excitement. One is the germanium laser. This is a topic of significant interest because these devices can operate at very high temperatures and therefore they can be next to the processor or ASIC. This can be a game-changer in how we envisage photonics and electronics being integrated.
We have germanium detectors and at Kotura we are working very hard to get a germanium electro-absorption modulator. We have shown this device can be extremely small and low power. And it can operate at very high speed - we have observed 3dB bandwidths in excess of 70GHz which means you can think of 100 Gigabit direct modulation for a device only 40 microns long and with a capacitance of a few femtofarads. So in terms of RF power, the dissipation of this device is virtually zero.
I would say the MIT group is probably leading the [germanium laser] efforts. They reported on room-temperature, current-driven laser emission which is very exciting. The efficiency of these lasers are still low for commercial applications; they probably have to improve by a factor of 100 or so. But given the progress we've seen in the last two years, if they keep going at that pace we may have viable germanium lasers in a couple of years. Then someone in industry has to take that on and turn it into a product and that is usually the hardest part.
This is exciting because that enables us to forget about off-the-chip lasers and integrate them in the device. We can then give up a whole bunch of problems. For example, the high temperature operation of the III-V devices is a real limit for us. Electronic devices can give off 100W and operate at 120oC, whereas optical devices often have to be stabilised, may go through multiple packaging layers, and the heat dissipation is usually directly related to cost.
If you could end up with a germanium laser that is happy at high temperatures - and we know our detectors and modulators work at high temperatures, and we know we can use electronic packaging to package these devices - then we can put these lasers next to the processor and address the bandwidth limitations that ASICs are facing today.
"Wavelength division multiplexing (WDM) is effectively a zero-power gearbox"
What was the second area?
The other area that was very interesting is graphene, a new material people are starting to work with and putting on silicon. They [researchers] are showing very low power, very high speed operation. It is still at a research level but that is another area we should watch.
The IEEE has started a group looking at the next speed Ethernet standard. No technical specification has been mentioned but it looks that 400 Gigabit Ethernet (GbE) will be the approach. Do you agree and what role can silicon photonics play in making the next speed Ethernet standard possible?
Industry is busy arguing about the different ways of doing 100 and 400GbE, and perhaps forgetting the fact that we have been here before.
The simple fact is that people always go for higher bit rate when it is cost-efficient and power-efficient to do so. After that, wavelengths are used.
Wavelength division multiplexing (WDM) is effectively a zero-power 'gearbox', mixing the signals in the optical domain. You do pay a power penalty for it in the form of photons lost in the multiplexer and demultiplexer. However that is not significant compared to the power consumption of an electronics gearbox chip.
Once we have exploited line rate and wavelength division multiplexing, we come to more complex modulation formats and pay the associated power and complexity penalty. Of course, more channels of fibre can always carry more information bandwidth but that is just a brute force solution that works while density and bandwidth requirements are moderate.
I think the right 100 Gigabit is based on a WDM 4x25 Gig solution. This can then scale to 400 Gigabit by adding more wavelengths, and can then scale to 1.6 Terabits. We have already demonstrated this in a single chip and will demonstrate this later in the form of a QSFP 100Gbps.
How does the interface scale to 1.6Tbps?
Our devices are capable of running at 40 or 50Gbps, depending on the electronics. The electronics is going to limit the speed of our devices. We can very easily see going from four channels at 25Gbps to 16 channels at 25Gbps to provide a 400 Gigabit solution.
We can also see a way of increasing the line rate to 50Gbps perhaps, either a straightforward NRZ (non-return-to-zero) line rate or some people are talking about multi-level modulation, PAM-4 (pulse amplitude modulation) type of stuff, to get to 50Gbps.
The customers we are talking to about 100Gbps are already talking about 400Gbps. So we can see 16x25Gbps, or 8x50Gbps if that is the right thing to do at the time based on the availability of electronics.
To go to 1.6 Terabit transceivers, we envisage something running at 40Gbps times 40 channels or 50Gbps times 32 channels. We already have done a single receiver chip demonstrator that has 40 channels, each at 40Gbps.
These things in silicon are not a big deal. The III-V guys really struggle with yield and cost. But you can envisage scaling to that level of complexity in a silicon platform.
Silicon photonics is spoken of not just as an optical platform like traditional optical integration technologies, but also as a design approach, making use of techniques associated with semiconductor design. The implication is that the technology will enable designs and even systems in a way that traditional optics can't. Can you explain how silicon photonics is a design approach and just what the implications are?
I think this is a key promise of silicon photonics, but perhaps one that has been oversold in recent years.
The key here is that given the maturity of the silicon processing capabilities, process simulation tools available and inherent properties of silicon, it is possible to predict the performance of the optical circuits far better in this platform than in any other before it. I think this is true and very valuable, potentially even a game changer.
However, we have to realise that there still remains an inherent difference between electrons and photons and their behavior in such circuits. Photons remain in a quantum world in such circuits, where the wavelength of light is comparable to feature sizes we manufacture. Hence we are dealing with a statistical quantum process whether we like it or not.
In summary, silicon will be a key enabler for on-chip system design, but it is too early for the university courses to stop graduating photonics PhDs!
So there is an advantage to silicon photonics but are you saying it is not that simple as using mature semiconductor design techniques?
Photons and electrons are like cats and dogs. Electrons are dogs: they behave, they stick by you, they are loyal, they do exactly as you tell them, whereas cats are their own animals and they do what they like. And that is what photons are like.
So it is really hard to predict what a photon does. The dimensions that we use for the structures we make are of the size of the wavelength of a photon. And that means it is more of a hit-and-miss process - there is always stray light, the stray light has a habit of interfering and you can always get unpredicted results.
When I interact with my electronic partners I find that they go through 6-9 months of very detailed simulation. They have very complex simulation tools.
When you come to photonics for sure we can borrow some of these simulation tools, we can simulate the process because we are using silicon. However some of the tolerances that we need are beyond what the silicon guys need, and the way the photons behave is very different. So in the end we don't spend 9 months simulating; we spend a month simulating and 3 months running the process and optimising it and re-running it and re-optimising it.
We end up with a reverse situation where the design is only 3 months, and the interaction with the designer and the manufacturing process is a 9-month process. So this is more of an iterative process. It is not as mature and a little bit more statistical.
UNIC silicon modulator
This is the silicon photonic start-up’s first announced modulator. The design has been developed in conjunction with Sun Microsystems as part of the DAPRA Ultraperformance Nanophotonic Intrachip Communications (UNIC) programme.
An image of the modulator and a cross-section diagram of the ring waveguide. Source: Kotura
Why is it important?
Optical components use a range of specialist, expensive materials. Silicon is one material that could transform the economics for optics. But for this to happen, the main optical functions – light generation, transmission and detection – need to be supported in silicon. To date, all the required functions except the laser itself - waveguides, modulators and photo-detectors - have been mastered and implemented in silicon.
However, the use of silicon photonics in commercial products has till now been limited. For example, Luxtera makes active optical cable that uses silicon photonics-based transceivers while Kotura has been producing silicon photonics-based VOAs for several years. Its VOA is used within reconfigurable optical add/drop multiplexers (ROADMs) and as a dimmer switch to protect optical receivers from network transients.
Kotura is also supplying its silicon-based Echelle gratings product for 40 and 100 Gigabit Ethernet (GbE) transceiver designs that require the multiplexing and demultiplexing of 4 and 10 wavelengths. The company’s gratings are also being used in Santur’s 100Gbit/s (10x10Gbit/s) transceiver design.
Kotura is in volume production of its VOAs and sampling its Ethernet gratings products, says Arlon Martin, vice-president of marketing and sales at Kotura: “The biggest interest is in 40 Gigabit Ethernet.” Given the small size of the gratings, Kotura is also seeing interest from vendors developing 40GbE transceivers in smaller form factors than the CFP module, such as the QSFP.
This will enable 1Tbit/s data rates over a single fibre to connect high-speed multi-core processor computing elements.
Arlon Martin of Kotura.
But the true potential for silicon photonics, one that promises huge volumes, is very short reach optical interconnects for use in high performance computing and within data centres. Having a low power silicon modulator means it can be integrated with other circuitry in CMOS rather than as a discrete design. Such an integrated approach ensures interconnect reliability.
Method used
There are several ways to modulate a laser. Direct modulation uses electronics to switch the laser on and off at the required rate to imprint the data onto the light. An electro-absorption modulated laser, in contrast, adds an element in front of an always-on laser that either passes or absorbs the light. Kotura’s modulator uses a third approach based on a micro-ring resonator and an adjacent waveguide.
The dimension of the ring – its circumference – dictates when optical resonance occurs. And by carefully matching the power coupling of the micro-ring and waveguide to that of the ring loss, signal attenuation– the light-off condition – is improved. The wavelength at which resonance occurs can be changed by playing with the optical properties of the ring waveguide.
Kotura and Sun have demonstrated the silicon modulator working at up to 11GHz, requiring a peak-to-peak voltage of 2V only. The modulator’s insertion loss is also an attractive 2dB though its working spectrum width is only 0.1nm.
“Our power number – 0.5mW at 10GHz - does not include the driver. But if you want to integrate a number of these on one chip, the low power consumption would enable this,” says Martin. Kotura claims the power consumption achieved is the lowest yet reported.
What next?
The modulator is one of the milestones of the DARPA UNIC programme now into the second of its five-year duration. “This [modulator] is prototype work, not a product,” says Martin, adding that Kotura has not fixed a date as to when the modulator will be commercially used.
As for how the device will ultimately be used, Kotura talks of interfaces operating between 100Gbit/s and 1 Tbit/s. Kotura is already working on an independent programme with CyOptics - the NIST Advanced Technology Programme - developing up to 1Tbit/s links using wavelength division multiplexing (WDM). Such designs use separate laser arrays - each laser at a specific wavelength – as well as gratings and photo-detectors.
In the future inexpensive light sources could generate up to 80 separate modulated lightpaths, Martin says. This will enable 1Tbit/s data rates over a single fibre to connect high-speed multi-core processor computing elements.
Is the idea similar to a broadband light source as proposed for WDM-PON? The UNIC partners have yet to reveal the programme’s detail. “Potentially on the right path,” is all Martin would say.
References:
[1] “Low Vpp, ultralow-energy, compact, high-speed silicon electro-optic modulator.” To read Kotura’s technical paper, click here.
[2] "PHOTONICS APPLIED: INTEGRATED PHOTONICS: Can optical integration solve the computational bottleneck?" OptoIQ, March 1, 2009, click here.