The CFP4 optical module to enable Terabit blades
Source: Gazettabyte, Xilinx
The CFP2 is about half the size of the CFP while the CFP4 is half the size of the CFP2. The CFP4 is slightly wider and longer than the QSFP.
The two CFP modules will use a 4x25Gbps electrical interface, doing away with the need for a 10x10Gbps to 4x25Gbps gearbox IC used for current CFP 100GBASE-LR4 and -ER4 interfaces. The CFP2 and CFP4 are also defined for 40 Gigabit Ethernet use.
The CFP's maximum power rating is 32W, the CFP2 12W and the CFP4 5W. But vendors that put eight CFP2 or 16 CFP4s on a blade still want to meet the 60W total power budget.
Getting close: Four CFP modules deliver slightly less bandwidth than 48 SFP+ modules: 4x100Gbps versus 480Gbps. The four also consume more power - 60w versus 48W. Moving to the CFP2 module will double the blade's bandwidth without consuming more power while the CFP4 will do the same again. a blade with 16 CFP4 modules promises 1.6Tbps while requiring 60W. Source: Xilinx
The first CFP2 modules are expected this year - there could be vendor announcements as early as the upcoming OFC/NFOEC 2012 show to be held in LA in the first week in March. The first CFP4 products are expected in 2013.
Further reading
The CFP MSA presentation: CFP MSA 100G roadmap and applications
MultiPhy boosts 100 Gig direct-detection using digital signal processing
The MP1100Q chip is being aimed at two cost-conscious metro networking requirements: 100 Gigabit point-to-point links and dense wavelength-division multiplexing (DWDM) metro networks.
The MP1100Q as part of a 100 Gig CFP module design. Source: MultiPhy
The 100 Gigabit market is still in its infancy and the technology has so far been used to carry traffic across operators’ core networks. Now 100 Gigabit metro applications are emerging.
Data centre operators want short links that go beyond the IEEE-specified 10km (100GBASE-LR4) and 40km (100GBASE-ER4) reach interfaces, while enterprises are looking to 100 Gigabit-per-second (Gbps) DWDM solutions to boost the capacity and reach of their rented fibre. Existing 100Gbps coherent technologies, designed for long-haul, are too expensive and bulky for the metro.
“There is long-haul and the [IEEE] client interfaces and a huge gap in between,” says Avishay Mor, vice president of product management at MultiPhy.
It is this metro 'gap' that MultiPhy is targeting with its MQ1100Q chip. And the fabless chip company's announcement is one of several that have been made in recent weeks.
ADVA Optical Networking has launched a 100Gbps metro line card that uses a direct-detection CFP, while Transmode has detailed a 100Gbps coherent design tailored for the metro. The 10x10 MSA announced in August a 10km interface as well as a 40km WDM design alongside its existing 10x10Gbps MSA that has a 2km reach.
MultiPhy's MP1100Q IC will enable two CFP module designs: a point-to-point module to connect data centres with a reach of up to 80km, and a DWDM design for metro core and regional networks with a reach up to 800km.
"MLSE is recognised as the best solution for mitigating inter-symbol interference."
Design details
The M1100Q uses a 4x28Gbps direct-detection design, the same approach announced by ADVA Optical Networking for its 100Gbps metro card. But MultiPhy claims that the 100Gbps DWDM CFP module will squeeze the four bands that make up the 100Gbps signal into a 100GHz-wide channel rather than 200GHz, while its IC implements the maximum likelihood sequence estimation (MLSE) algorithm to achieve the 800km reach.
The four optical channels received by a CFP are converted to electrical signals using four receiver optical subassemblies (ROSAs) and sampled using the MP1100Q’s four analogue-to-digital (a/d) converters operating at 28Gbps.
The CFP design using MultiPhy’s chip need only use 10Gbps opto-electronics for the transmit and receive paths. The result is a 100Gbps module with a cost structure based on 4x10Gbps optics.
The lower bill-of-materials impacts performance, however. “When you over-drive these 10Gbps opto-electronics - on the transmit and the receive side - you create what is called inter-symbol interference," says Neal Neslusan, vice president of sales and marketing at MultiPhy.
Inter-symbol interference is an unwanted effect where the energy of a transmitted bit leaks into neighboring signals. This increases the bit-error rate and makes the detector's task harder. "The way that we get around it is using MLSE, recognised as the best solution for mitigating inter-symbol interference," says Neslusan.
Unwanted channel effects introduced by the fibre, like chromatic dispersion, also induce inter-symbol interference and are also countered by the MLSE algorithm on the MP1100Q.
MultiPhy is proposing two CFP designs for its chip. One is based on on-off-keying modulation to achieve 80km point-to-point links and which will require a 200GHz channel to accommodate the 100Gbps signal. The second uses optical duo-binary modulation to achieve the longer reach and more spectrally efficient 100GHz spacings.
The company says the resulting direct-detection CFP using its IC will cost some US $10,000 compared to an estimated $50,000 for a coherent design. In turn the 100G metro CFP’s power consumption is estimated at 24W whereas a coherent design consumes 70W.
MP1100Q samples have been with the company since June, says Mor. First samples will be with customers in the fourth quarter of this year, with general availability starting in early 2012.
If all goes to plan, first CFP module designs using the chip will appear in the second half of 2012, claims MultiPhy.